ADSP21565WCSWZ10RL

Enhanced SHARC+ high performance floating-point core
Up to 1 GHz
5 Mb (640 kB) Level 1 (L1) SRAM memory with parity
(optional ability to configure as cache)
32-bit, 40-bit, and 64-bit floating-point support
32-bit fixed point
Byte, short word, word, long word addressed
Powerful DMA system
On-chip memory protection
Integrated safety features
17 mm × 17 mm, 400-ball CSP_BGA (0.8 mm pitch), RoHS
compliant
120-lead LQFP_EP (0.4 mm pitch), RoHS compliant
Low system power across automotive temperature range

Please send inquiry for pricing.